Creating densely packed nanostructures is critical to the emerging field of nanotechnology and to the advanced semiconductor integrated circuits (IC) industry. One of the first steps typically employed in creating advanced ICs is to use lithography to define a pattern. The scaling of the pattern to nanotechnology dimensions, however, may create challenges for the material and processes employed due to the physical limitations of both. The critical dimensions of current state of the art devices are on the scale of nanometers. Designing devices at this scale may lead to a variety of issues including optics (fringing) effects and nanoscale alignment. Further, current techniques often require multiple masking steps in order to create nanostructures. Therefore, it is highly desirable to have a technique to form nanostructures that allows for the creation of non-uniform material features with a simplified fabrication process.